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| INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC * The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4556B MSI Dual 1-of-4 decoder/demultiplexer Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Dual 1-of-4 decoder/demultiplexer DESCRIPTION The HEF4556B is a dual 1-of-4 decoder/demultiplexer. Each has two address inputs (A0 and A1), an active LOW enable input (E) and four mutually exclusive outputs which are active LOW (O0 to O3). When used as a decoder, E when HIGH, forces O0 to O3 HIGH. When used as a demultiplexer, the appropriate output is selected by the information on A0 and A1 with E as data input. All unselected outputs are HIGH. HEF4556B MSI Fig.2 Pinning diagram. HEF4556BP(N): HEF4556BD(F): HEF4556BT(D): 16-lead DIL; plastic (SOT38-1) 16-lead DIL; ceramic (cerdip) (SOT74) 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING E A0 and A1 O0 to O3 enable inputs (active LOW) address inputs outputs (active LOW) FAMILY DATA, IDD LIMITS category MSI See Family Specifications Fig.1 Functional diagram. January 1995 2 Philips Semiconductors Product specification Dual 1-of-4 decoder/demultiplexer HEF4556B MSI Fig.3 Logic diagram (one decoder/multiplexer). TRUTH TABLE INPUTS E L L L L H Notes 1. H = HIGH state (the more positive voltage) 2. L = LOW state (the less positive voltage) 3. X = state is immaterial A0 L H L H X A1 L L H H X O0 L H H H H OUTPUTS O1 H L H H H O2 H H L H H O3 H H H L H January 1995 3 Philips Semiconductors Product specification Dual 1-of-4 decoder/demultiplexer AC CHARACTERISTICS VSS = 0 V; Tamb = 25 C; CL = 50 pF; input transition times 20 ns VDD V Propagation delays An On HIGH to LOW 5 10 15 5 LOW to HIGH En On HIGH to LOW 10 15 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 10 15 tTLH tTHL tPLH tPHL tPLH tPHL 130 50 35 105 40 30 120 45 30 105 40 30 60 30 20 60 30 20 255 100 65 210 85 60 240 90 60 205 80 60 120 60 40 120 60 40 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns SYMBOL MIN. TYP. MAX. HEF4556B MSI TYPICAL EXTRAPOLATION FORMULA 103 ns + (0,55 ns/pF) CL 39 ns + (0,23 ns/pF) CL 27 ns + (0,16 ns/pF) CL 78 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 93 ns + (0,55 ns/pF) CL 34 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 78 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL VDD V Dynamic power dissipation per package (P) 5 10 15 TYPICAL FORMULA FOR P (W) 4400 fi + (foCL) x VDD2 18 000 fi + (foCL) x 43 300 fi + (foCL) x VDD2 VDD2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) (foCL) = sum of outputs VDD = supply voltage (V) APPLICATION INFORMATION Some examples of applications for the HEF4556B are: * Code conversion. * Address decoding. * Demultiplexing: when using the enable input as data input. January 1995 4 |
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